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T3GE9WBG 2014-03-01 1 toshiba digital integrated circuit silicon monolithic T3GE9WBG dual supply bus transceiver for sd card the T3GE9WBG is a dual supply, advanced high-speed cmos dual supply voltage interface bus transceiver fabricated with silicon gate cmos technology. designed for use as an interface between a 1.8-v bus and a 2.9-v bus in mixed 1.8- v/2.9-v supply systems. the a-port interfaces with the 1.8-v bus, the b-port with the 2.9-v bus. the direction of data transmission is determined by the level of the dir input. all inputs are equipped with prot ection circuits against static discharge or transi ent excess voltage. features bidirectional interface betw een 1.8-v and 2.9-v buses. high-speed operation : t pd = 8.5 ns (max) (v cca = 1.8 0.15 v, v ccb = 2.9 0.1 v) output current : i ohb /i olb = 6 ma (min) (v ccb = 2.8 v) i oha /i ola = 6 ma (min) (v cca = 1.65 v) regulator output current: 200ma (min) integrated emi filter on b-port integrated pull-up and pull- down resistors on b-port latch-up performance : 200 ma esd performance : machine model > 200 v human body model > 2000 v iec61000-4-2 level 4 (contact) > 8000 v ( sd card side ) ultra-small package : wcsp24 weight: 0.006 g (typ.) start of commercial production 2008-07
T3GE9WBG 2014-03-01 2 pin assignment (top view) truth table input outputs clk.h clk-f clk-b l l l h h h inputs function cmd-dir cmd.h cmd-b outputs l output input cmd.h = cmd-b h input output cmd-b = cmd.h inputs function dat0-dir dat0.h dat0-b outputs l output input dat0.h = dat0-b h input output dat0-b = dat0.h inputs function dat123-dir dat1.h ? dat3.h dat1-b ? dat3-b outputs l output input datn.h = datn-b h input output datn-b = datn.h 1 2 3 4 5 a dat2.h cmd-dir dat0-dir v batt dat2-b b dat3.h -- v cca v ccb o/p dat3-b c clk.h enable gnd gnd clk-b d dat0.h cmd.h cd cmd-b dat0-b e dat1.h clk-f dat123-dir wp dat1-b input output enable regulator l off h on 1 2 3 4 5 a b c d e ( to p view )
T3GE9WBG 2014-03-01 3 block diagram clk-b v cca v ccb o/p clk.h logic level converter clk-f r8 r9 c v cca cmd-b cmd-dir cmd.h logic level converter r2 r8 r9 c v ccb o/p data0-b v cca data0-dir data0.h logic level converter r3 r8 r9 c v ccb o/p v cca data123-dir data1.h data2.h logic level converter data3.h data1-b data2-b data3-b r4 r5 r8 r9 r8 r9 c c v ccb o/p
T3GE9WBG 2014-03-01 4 block diagram absolute maximum ratings (note 1) characteristics symbol rating unit v cca ?0.5 to 3.0 power supply voltage v batt 5.5 v dir, clk.h ?0.5 to v cca + 0.5 dc input voltage enable v in ?0.5 to 5.5 v v i/oa ?0.5 to v cca + 0.5 (note 2) dc bus i/o voltage v i/ob ?0.5 to v ccb + 0.5 (note 2) v dir, clk.h 25 input diode current enable i ik ?25 ma output diode current i i/ok 25 (note 3) ma i outa 25 dc output current i outb 25 ma dc v cc /ground current per supply pin i cca 50 ma power dissipation p d 400 mw storage temperature t stg ?55 to 150 c note 1: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. note 2: high or low stats. i out absolute maximum rating must be observed. note 3: v out < gnd, v out > v cc symbol value (typ) r3, r4 70k ? r2 15k ? r5 470k ? r6, r7 100k ? r8 5 ? r9 35? c 35pf v cca cd v cca wp r6 r7 ldo v batt v ccb o/p enable
T3GE9WBG 2014-03-01 5 operating range (note 1) characteristics symbol rating unit v cca 1.65 to 1.95 power supply voltage v batt 3.2 to 5.0 v dir, clk.h 0 to v cca input voltage enable v in 0 to 5.0 v v i/oa 0 to v cca (note 2) bus i/o voltage v i/ob 0 to v ccb o/p(note 2) v i outa 6 (note 3) output current i outb 6 (note 4) ma operating temperature t opr ?30 to 85 c input rise and fall time dt/dv 0 to 10 (note 5) ns/v note 1: the operating range is required to ensure the no rmal operation of the device. unused inputs and bus inputs must be tied to either v cc or gnd. please connect both bus inputs and the bus outputs with v cc or gnd when the i/o of the bus terminal changes by the function . in this case, please note that the output is not short-circuited. note 2: high or low state note 3: v cca = 1.65 to 1.95 v note 4: v ccb = 2.8 to 3.0 v, v ccb is supplied from the built-in ldo. note 5: v cca = 1.65 v, v ccb = 2.8 v
T3GE9WBG 2014-03-01 6 electrical characteristics dc characteristics (1.65 v v cca 1.95 v, 2.8 v v ccb 3.0 v) ta = ? 30 to 85c characteristics symbol test condition v cca (v) v ccb (v) min max unit v iha dir, an (note 1) 1.65 to 1.95 2.8 to 3.0 v cca 0.65 ? h-level input voltage v ihb bn (note 1) 1.65 to 1.95 2.8 to 3.0 2.0 ? v v ila dir, an (note 1) 1.65 to 1.95 2.8 to 3.0 ? v cca 0.35 l-level input voltage v ilb bn (note 1) 1.65 to 1.95 2.8 to 3.0 ? 0.8 v i oha = ?100 a 1.65 to 1.95 2.8 to 3.0 v cca ? 0.2 ? v oha i oha = ? 6 ma 1.65 2.8 to 3.0 1.15 ? i ohb = ?100 a 1.65 to 1.95 2.8 to 3.0 v ccb ? 0.2 ? h-level output voltage v ohb v in = v ih or v il i ohb = ?6 ma 1.65 to 1.95 2.8 2.2 ? v i ola = 100 a 1.65 to 1.95 2.8 to 3.0 ? 0.2 v ola i ola = 6 ma 1.65 2.8 to 3.0 ? 0.3 i olb = 100 a 1.65 to 1.95 2.8 to 3.0 ? 0.2 l-level output voltage v olb v in = v ih or v il i olb = 6 ma 1.65 to 1.95 2.8 ? 0.4 v i ia v ina = v cca or gnd dir = high v cd = v wp = v cca 1.65 to 1.95 2.8 to 3.0 ? 5.0 input leakage current i ib v cmd-b, dat0, dat1, dat2 = v cca v dat3 = gnd dir = low v cd = v wp = v cca 1.65 to 1.95 2.8 to 3.0 ? 5.0 a quiescent supply current i cca v ina = v cca or gnd dir = high v cd = v wp = v cca 1.65 to 1.95 2.8 to 3.0 ? 20 a note 1: an is a host side sign al. bn is a card side signal. note: v ccb is supplied from the built-in ldo.
T3GE9WBG 2014-03-01 7 ac characteristics (ta = ? 30 to 85c, input: t r = t f = 2.0 ns) v cca = 1.8 0.15 v, v ccb = 2.9 0.1 v characteristics symbol test condition min typ. max unit propagation delay time (bn an) t plh t phl figure 1, figure 2 1.0 ? 8.5 ns propagation delay time (an bn) t plh t phl figure 1, figure 2 1.0 ? 8.5 ns propagation delay time (clk.h clk-f) t plh t phl figure 1, figure 2 1.0 ? 14 ns output transition time (an) t tlh t thl figure 1, figure 2 ? 1.5 ? ns output transition time (bn) t tlh t thl figure 1, figure 2 ? 1.5 ? ns output to output skew t oslh t oshl (note 1) ? ? 0.5 ns note 1: parameter guaranteed by design. (t oslh = |t plhm ? t plhn |, t oshl = |t phlm ? t phln |) note: an is a host side signal . bn is a card side signal. v ccb is supplied from the built-in ldo. dynamic switching characteristics (ta = 25c, input: t r = t f = 2.0 ns, c l = 15 pf) characteristics symbol test condition v cca (v) v ccb (v) typ. unit a b 1.8 2.9 0.35 quiet output maximum dynamic v ol b a v olp v ih = v cc , v il = 0 v (note 2) 1.8 2.9 0.25 v a b 1.8 2.9 ?0.35 quiet output minimum dynamic v ol b a v olv v ih = v cc , v il = 0 v (note 2) 1.8 2.9 ?0.25 v a b 1.8 2.9 3.25 quiet output maximum dynamic v oh b a v ohp v ih = v cc , v il = 0 v (note 2) 1.8 2.9 2.05 v a b 1.8 2.9 2.55 quiet output minimum dynamic v oh b a v ohv v ih = v cc , v il = 0 v (note 2) 1.8 2.9 1.55 v note 2: parameter guaranteed by design. note: an is a host side signal . bn is a card side signal. capacitive characteristics (ta = 25c) characteristics symbol test circuit v cca (v) v ccb (v) typ. unit a b (dir = ?h?) 1.8 2.9 24 c pda b a (dir = ?l?) 1.8 2.9 22 a b (dir = ?h?) 1.8 2.9 76 power dissipation capacitance (note 3) c pdb b a (dir = ?l?) 1.8 2.9 28 pf note 3: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd ?v cc ?f in + i cc /6 (per bit)
T3GE9WBG 2014-03-01 8 regulator section electrical characteristics (unl ess otherw ise specified, v in = v out + 1 v, i out = 1 ma, c in = 0.1 f, c out = 2.2 f, t j = 25c) characteristics symbol test condition min typ. max unit input voltage v in ? 3.2 ? 5.0 v output voltage v ccb o/p 2.8 2.9 3.0 v line regulation reg ? line v out + 0.5 v v in 5.0 v, i out = 1 ma ? 3 15 mv load regulation reg ? load 1 ma i out 200 ma ? ? 150 mv i b1 i out = 0 ma ? 40 80 quiescent current i b2 i out = 100 ma ? 45 85 a stand-by current i b (off) v ct = 0 v ? 0.1 1.0 a output noise voltage v no v in = v out + 1 v, i out = 10 ma, 10 hz f 100 khz, ta = 25c ? 140 ? v rms temperature coefficient t cvo ?40c t opr 85c ? 100 ? ppm/c ripple rejection r.r. v in = v out + 1 v, i out = 10 ma, f = 1 khz, v ripple = 500 mv p-p , ta = 25c ? 40 ? db control voltage (on) v ct (on) ? 1.5 ? v in v control voltage (off) v ct (off) ? 0 ? 0.25 v control current (on) i ct (on) v ct = 1.5 v ? ? 0.1 a control current (off) i ct (off) v ct = 0 v ? ? 0.1 a peak output current ioutpeak 200 ? ? ma emi filter response (typical performance) -60 -50 -40 -30 -20 -10 0 0.1 1 10 frequency [ghz] attenuation [db]
T3GE9WBG 2014-03-01 9 90% 10% output (bn, an) input (an, bn) v ol v oh v ih v m t plh t phl t r 2.0 ns t f 2.0 ns v m gnd 90% 10% t tlh t thl ac test circuit figure 1 ac waveform figure 2 t plh , t phl , t tlh , t thl v cc (output) symbol 2.9 0.1 v 1.8 0.18 v r l 2 k 2 k c l 15 pf 15 pf v cc symbol 2.9 0.1 v 1.8 0.18 v v ih v cc v cc v m v cc /2 v cc /2 out p ut measure r l c l
T3GE9WBG 2014-03-01 10 package dimensions weight: 0.006 g (typ.) the resin used in this p roduct includes no flame retardants. unit: mm
T3GE9WBG 2014-03-01 11 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product's quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situations in which a ma lfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest versions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and application notes for product and the precautions and condi tions set forth in the "toshiba semiconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? 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